Computer evolution

  • Start RISC

    IBM brought together a group of its researchers to study how a program could work on multiple computers without major changes.
  • 4004 x86

    4004 x86
    •First Microprocessor
    •Built for Busicom calculators.
    •4-bit registers
    •108 kHz.
    •2,300 transistors.
    •640 bytes of memory.
  • 8080 x86

    8080 x86
    •Used in the MITS Altair 8800, the first commercial personal computer.
    •8-bit registers.
    •16-bit address bus.
    •2 MHz.
    •6,000 transistors.
    •64Kbytes of memory
  • RISC architecture is generated

    The RISC architecture is a type of CPU design generally used in microprocessors that has the following fundamental characteristics: Instructions that are fixed in size and presented in a reduced number of formats.
  • 8086/8088 x86

    8086/8088 x86
    •Used in the original IBM PC.
    •First 16-bit microprocessor.
    •20-bit address bus.
    •16-bit (8086) and 8-bit (8088) data bus.
    •4.77+ MHz.
    •29,000 transistors.
    •Addressable memory 1Mb.
  • 80286 x86

    80286 x86
    •Used in the original IBM PC/AT.
    •24-bit address bus.
    •16-bit data bus.
    •6+ MHz.
    •134,000 transistors.
    •Multitasking, protected mode and virtual memory.
    •Addressable memory 16Mb.
  • The first designs of the ARM architecture begin.

    The first designs of the ARM architecture begin.
    The design of the ARM architecture began in 1983 as a development project by Acorn Computers.
  • ARM1.

    ARM1.
    The team finishes the design of the first prototype which they called ARM1.
  • 80386 x86

    80386 x86
    •32-bit registers.
    •32-bit address bus.
    •32-bit data bus.
    •Pipelining.
    •16+ MHz.
    •275,000 transistors.
    •Addressable memory 4Gb.
  • First version of the MIPS architecture

    Both MIPS and R2000 were introduced together in 1985.
  • Launch of the First Computer with ARM Processor.

    Launch of the First Computer with ARM Processor.
    They were released by Acorn computers on their Acorn Archimedes personal computers, which used the ARM2 processor.
  • P4: 80486 x86

    P4: 80486 x86
    •Better execution speed.
    •Integrated floating point unit (FPU).
    •8 KB L1 cache.
    •25+ MHz.
    •1,200,000 transistors.
    •Addressable memory 4Gb.
  • First implementation of MIPS II

    First implementation of MIPS II
    MIPS Computer Systems' R6000 microprocessor (1989) was the first implementation of MIPS II. [3] :8 Designed for servers, the R6000 was manufactured and sold by Bipolar Integrated Technology, but was a commercial failure.
  • Advance Risk Machines company is created.

    Acorn Computers decides to create its own brand of ARM processors in order to sell them to other companies, including Apple.
  • Primera implementación de MIPS III

    Primera implementación de MIPS III
    El microprocesador R4000 de MIPS Computer Systems (1991) fue la primera implementación de MIPS III. Fue diseñado para su uso en computadoras personales, estaciones de trabajo y servidores.
  • Apple uses ARM6 processor.

    Apple uses ARM6 processor.
    After the start of the ARM company, Apple uses the ARM6 model to launch its innovative Apple Newton pocket computer.
  • P5: Pentium x86

    P5: Pentium x86
    •64-bit data bus.
    •8 KB L1 cache for data and 8 KB for code.
    •Dual pipeline for integer operations.
    •60+ MHz.
    •3,100,000 transistors.
    •Addressable Memory 4Gb.
  • R4200 MIPS

    R4200 MIPS
    R4200 de MIPS Technologies fue diseñado para sistemas integrados, portátiles y computadoras personales.
  • First MIPS IV implementation

    The first implementation of MIPS IV was the MIPS Technologies R8000 microprocessor chipset.
  • P6: Pentium Pro x86

    P6: Pentium Pro x86
    •36-bit address bus.
    •256 KB L2 cache.
    •Superpipelining.
    •Speculative and out of order execution.
    •150+ MHz.
    •5,500,000 transistors.
    •Addressable Memory 64Gb.
  • R4300 i MIPS

    R4300 i MIPS
    The R4300i, made by NEC Electronics, was used in the Nintendo 64 game console. The Nintendo 64, along with the PlayStation, were among the highest volume users of MIPS architecture processors.
  • MIPS V

    Announced on October 21, 1996 at the Microprocessor Forum 1996 along with the MIPS Digital Media Extensions (MDMX), MIPS V was designed to improve the performance of 3D graphics transformations.
  • P55C: Pentium MMX x86

    P55C: Pentium MMX x86
    •Classic Pentium with MMX technology: 64-bit SIMD multimedia and communication extensions.
    •16 KB L1 cache for data and 16 KB for code.
    •166+ MHz.
    •4,500,000 transistors.
    •Addressable memory 4Gb.
  • Klamath: Pentium II x86

    Klamath: Pentium II x86
    •Pentium Pro with MMX technology.
    •16 KB L1 cache for data and
    16 KB for code.
    •512 KB L2 cache.
    •233+ MHz.
    •7,500,000 transistors.
    •Addressable Memory 64Gb.
  • PII Xeon x86

    PII Xeon x86
    •“Enhanced” Pentium II
    •L2 cache runs at full processor speed.
    •Designed for the computer server market.
  • Celeron x86

    Celeron x86
    •Pentium II with no L2 cache.
    •Designed for the sub-$1,000 PC market.
  • MIPS Technologies was spun off from Silicon Graphics

    MIPS Technologies was spun off from Silicon Graphics.
  • Katmai: Pentium III x86

    Katmai: Pentium III x86
    •Pentium II with 128-bit SIMD floating point oriented extension to the MMX technology.
    •Processor serial number in order to “enhance security”.
    •450+ MHz.
    •Addressable Memory 64Gb
  • Merced: Itanium x86

    Merced: Itanium x86
    •Intel Architecture-64 (IA-64).
    •Developed jointly by Intel and Hewlett-Packard.
    •Hardware x86 emulation.
    •Not RISC or CISC, but EPIC (Explicitly Parallel Instruction Computing).
    •600 MHz and 1,000 MHz.
    •Tens of millions of transistors.
  • Pentium IV x86

    Pentium IV x86
    •0.18-micron
    •42 million transistors on a single chip.
    •1.4 3.0 Ghz.
    •Bus Speed 400 Mhz.
  • New ARM Design.

    ARM launches its new architecture that they would call ARMv6.
  • Pentium M x86

    Pentium M x86
    •130 nanometer technology
    •Based on P6 architecture
    •Extended pipeline (12-14 stages)
    •Variable length pipeline
    •1MB L2 cache
    •1.8 GHz
    •24.5 Watts
  • Core:core 2 Duo x86

    Core:core 2 Duo x86
    •65 nanometer technology
    •Intel 64-bit architecture
    •Dual Core
    •4MB L2 Cache
    •x86-64 Instructions
    •1.06 GHz - 3.33 GHz
  • Nehaem: Core i7 x86

    Nehaem: Core i7 x86
    •Pentium 5 based
    •Designed for the notebook and low-budget market
    •512 KB L2 cache
    •2.13 GHz
  • Silverthorne: Atom x86

    Silverthorne: Atom x86
    •Pentium 5 based
    •Designed for the notebook and low-budget market
    •512 KB L2 cache
    •2.13 GHz
  • Skylake: Core i7 x86

    Skylake: Core i7 x86
    •14 nanometer technology
    •L1 cache of 64 KiB per core
    •256 KiB L2 cache per core
    •2MiB L3 cache per core
    •CPU, GPU and Memory Controller in the same package
  • Coffe Lake: Core i3, i5, i7, i9 x86

    Coffe Lake: Core i3, i5, i7, i9 x86
    •Eight cores based on the Coffee Lake architecture (2019 refresh, CFL-HR).
    •The processor clocks at between 2.4 -5 GHz
    •Can execute up to sixteen simultaneous threads thanks to Hyper-Threading.
  • MIPS OPEN.

    MIPS OPEN.
    In December 2018, Wave Computing, the new owner of the MIPS architecture, announced that the MIPS ISA would be open sourced in a program called the MIPS Open initiative.
  • Nvidia buys ARM.

     Nvidia buys ARM.
    The great graphics company Nvidia buys ARM for 40 billion dollars, this purchase is a great strategy for the future of the brand, since it is found in the most recognized mobile devices in the world.
  • Apple uses ARM in its laptops.

    Apple breaks away from the Intel architecture and creates its own ARM processor which they call Apple Silicon. This is beginning to change the market, causing other brands to start preparing theirs as well.
  • MIPS32 / MIPS64

    MIPS32/MIPS64 version 5 was announced on December 6, 2012.
  • Union of MIPS with RISC V.

    In March 2021, Wave Computing announced that development of the MIPS architecture had ceased. The company has joined the RISC-V Foundation and future processor designs will be based on the RISC-V architecture.